A successful atomic operation includes an uninterrupted sequence of operations. An atomic operation is regarded as a failed atomic operation if the sequence was not completed. A typical atomic operation includes “read-modify-write” operations.
Many modern devices include multiple semiconductor components, such as microprocessors, direct memory access units, micro-controllers, and the like. In order to reduce the cost of these increasingly complex devices multiple components share the same system resources. The shared resources are typically memory banks, buses, peripherals and the like.
In order to avoid collisions, a shared resource can be controlled by only one master component at the time. Typical control schemes include determining an availability of a shared resource before attempting to control the slaved component. U.S. Pat. No. 6,446,149 of Moriarty, et al., titled “Self-modifying synchronization memory address space and protocol for communication between multiple bus masters of a computer system”, which is incorporated herein by reference, describes a method for managing a shared resource.
The availability of a shared resource is usually represented by a semaphore. A semaphore is a flag or status indicator that can be accessed by various components. It usually resides at a predefined memory address, and its value reflects if the shared resource is available or not.
It is common practice to update a semaphore using a “read-modify-write” atomic operation. There are two common methods for updating a semaphore. The first method involves locking a memory module that stores the semaphore until the semaphore update procedure is completed. In some prior art systems the memory module and optionally one or more buses are locked during the semaphore update procedure. A locking type semaphore updating procedure usually includes: (i) locking the memory module and optionally locking one or more bus; (ii) reading, by the requesting component, the semaphore, (iii) determining, in response to the value of the semaphore, if the shared resource is available, (iv) if the semaphore value indicates that the shared resource is available—altering the semaphore to indicate that the shared resource is scheduled to be used by the requesting component, else—determining that the shared entity is not available, and (v) unlocking the memory and one or more bus that was previously locked. This method causes a significant degradation in the bus and memory performances.
A second method includes address snooping. In this method, the memory module and optionally one or more buses are not locked during the entire process. The requesting component does not prevent other components from accessing the memory module, but monitors that memory module to determine if the semaphore was modified between the read and expected modify stages. If such a modification occurred the atomic operation is flagged as a failed atomic operation and the requesting component can decide whether to repeat the atomic operation.
Snooping type atomic operation is more bandwidth effective than the locking type atomic operation but is more complex. U.S. Pat. No. 5,727,172 of Eiffert at el., titled “Method and apparatus for performing atomic accesses in a data processing system”, which is incorporated herein by reference, describes an address snooping method. It requires snoop logic to support multiple bus masters.
Due to the complexity of many modern semiconductor components, and especially microprocessors, the design of most semiconductor devices is based upon previously developed components. In some cases various semiconductor components that share the resource apply different types of atomic operations.
U.S. Pat. No. 5,548,780 of Krein, titled “Method for semaphore communication between incompatible bus locking architectures”, which is incorporated herein by reference, describes a multiple bus architecture that includes multiple bus-bridges for propagating atomic operations between different buses. The method requires that the semaphore has a certain predetermined value that shall indicate the availability of the shared resource.
U.S. Pat. No. 6,381,663 of Morrison et al., titled “Mechanism for implementing bus locking with a mixed architecture”, which is incorporated herein by reference, describes an apparatus and method for bridging between a bus that supports atomic operations and another bus that does not support atomic operations. This solution is very costly in terms of performance.
There is a need to provide an apparatus and method that can efficiently handle different types of atomic transactions.